Peter Mathys
5.35K subscribers
1:14:01
GNURadio 3.10 on Ubuntu 22 in VirtualBox
Peter Mathys
1.2K views • 9 months ago
36:26
Setup VirtualBox and Install Ubuntu 22.04
Peter Mathys
811 views • 9 months ago
51:06
Installing Miniconda And Complex Exponentials Examples in Jupyter Notebook
Peter Mathys
172 views • 9 months ago
46:28
Sampling Theorem - Graphical Derivation
Peter Mathys
222 views • 1 year ago
6:10
Soldering 101
Peter Mathys
871 views • 3 years ago
13:50
Analog Discovery 2: Flywire Assembly vs BNC Adapter
Peter Mathys
2.8K views • 3 years ago
9:35
Analog Discovery 2 and WaveForms: A First Measurement
Peter Mathys
6.6K views • 3 years ago
31:17
Fractional Number Conversions
Peter Mathys
606 views • 5 years ago
27:49
Decimal to Binary and Others Conversion
Peter Mathys
622 views • 5 years ago
14:55
Fractional Number Representation
Peter Mathys
600 views • 5 years ago
13:08
Number Systems with Radix r
Peter Mathys
1.1K views • 5 years ago
1:19
BPSK Signal in GNU Radio Companion
Peter Mathys
4.9K views • 7 years ago
0:21
GNU Radio: Pulse Amplitude Modulation with Noise (Matched Filter)
Peter Mathys
1.6K views • 7 years ago
0:21
GNU Radio: Pulse Amplitude Modulation with Noise (Impulse Sampling)
Peter Mathys
818 views • 7 years ago
0:22
GNU Radio: Pulse Amplitude Modulation
Peter Mathys
2.7K views • 7 years ago
17:41
Intro to Verilog and ModelSim, Part2
Peter Mathys
12K views • 8 years ago
30:23
Intro to Verilog and ModelSim, Part1
Peter Mathys
51K views • 8 years ago
20:30
Counter Design Using FSM Approach
Peter Mathys
12K views • 9 years ago
23:12
State Minimization, Part2
Peter Mathys
3.1K views • 9 years ago
16:41
State Minimization, Part1
Peter Mathys
37K views • 9 years ago
37:41
BCD Adder in Verilog
Peter Mathys
13K views • 9 years ago
30:55
Prime Implicants and More
Peter Mathys
50K views • 9 years ago
14:30
NAND/NOR Only Example
Peter Mathys
98K views • 9 years ago
24:54
Boolean Algebra Example
Peter Mathys
5.3K views • 9 years ago
15:20
Boolean Identity Proofs
Peter Mathys
9.1K views • 9 years ago
19:29
Decimal To Binary And Hexadecimal
Peter Mathys
1K views • 9 years ago
34:50
Finite State Machines in Verilog
Peter Mathys
69K views • 9 years ago
25:05
Verilog for Registers and Counters
Peter Mathys
48K views • 9 years ago
22:02
Fast Adders, Part1
Peter Mathys
17K views • 9 years ago
40:17
Arithmetic Circuits in Verilog, Part 2
Peter Mathys
3.2K views • 9 years ago
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