32 Charge Pumps

Co-Packaged Optics for our Connected Future

Modelling Equalization with SerDesPy

Simple Channel Modeling Example with SerDesPy

Introduction to SerDesPy

CMOS 160Gbps 4PAM Optical Receiver Front-End

Deep-Dive: 112Gbps 16nm CMOS TIA with Co-Packaged Photodiodes

Injection-Locked Phase Rotator

Demo: 112 Gbps 4-PAM 16nm FinFET CMOS TIA

Low-Jitter CMOS Clock Distribution

Feedforward Compensation Example

DC Characteristics of 45nm NMOS

Common Source Gain-Bandwidth Tradeoffs

04 IC Passives

11 Single Stage Opamp Basics

16 Noise Time Domain Analysis

01 MOS Square Law and Parasitics

02 MOSFET as a Switch

27 CMOS Comparator Operation

28 Comparator Specs and Characterization

21 Nonlinearity and Dynamic Range

24 Biasing Circuits

23 Fully Differential Analog Circuits

29 Electronic Oscillators

31 Integer N Charge Pump PLL Basics

13 Other Single Stage Op Amps

17 Introduction to Noise

30 Jitter and Phase Noise in Oscillators

06 Analog amplifier biasing and mismatch

33 PLL Linear Analysis and Design Procedure